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  1. general description the 74lvc1g53-q100 is a low- power, low-voltage, high-speed, si-gate cmos device. the 74lvc1g53-q100 provides one analog mult iplexer/demultip lexer with a digital select input (s), two independent inputs/outputs (y0 and y1), a common input/output (z) and an active low enable input (e ). when pin e is high, the switch is turned off. schmitt-trigger action at the select and enable inputs makes the circuit tolerant to slower input rise and fall times across the entire v cc range from 1.65 v to 5.5 v. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? wide supply voltage range from 1.65 v to 5.5 v ? very low on resistance: ? 7.5 ? (typical) at v cc =2.7v ? 6.5 ? (typical) at v cc =3.3v ? 6 ? (typical) at v cc =5v ? switch current ca pability of 32 ma ? high noise immunity ? cmos low power consumption ? ttl interface compatibility at 3.3 v ? latch-up performance meets requirements of jesd 78 class i ? multiple package options ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer rev. 1 ? 29 january 2013 product data sheet
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 2 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 3. ordering information 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram table 1. ordering information type number package temperature range name description version 74lvc1g53dp-q100 ? 40 ? c to +125 ? c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74LVC1G53DC-Q100 ? 40 ? c to +125 ? c vssop8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 table 2. marking codes type number marking code [1] 74LVC1G53DC-Q100 v53 74lvc1g53dp-q100 v53 fig 1. logic symbol 001aah795 s z e y0 y1 fig 2. logic diagram 001aad387 z y0 s y1 e
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 3 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level; x = don?t care; z = high-impedance off-state. fig 3. pin configuration sot505-2 and sot765-1 
      
 
       table 3. pin description symbol pin description z 1 common output or input e 2 enable input (active low) gnd 3 ground (0 v) gnd 4 ground (0 v) s 5 select input y1 6 independent input or output y0 7 independent input or output v cc 8 supply voltage table 4. function table [1] input channel on s e l l y0 to z or z to y0 h l y1 to z or z to y1 x h z (switch off)
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 4 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 8. limiting values [1] the minimum input voltage rating may be exceeded if the input current rating is observed. [2] the minimum and maximum switch voltage ratings may be e xceeded if the switch clamping current rating is observed. [3] for tssop8 packages: above 55 ? c the value of p tot derates linearly with 2.5 mw/k. for vssop8 packages: above 110 ? c the value of p tot derates linearly with 8.0 mw/k. 9. recommended operating conditions [1] to avoid sinking gnd current from termi nal z when switch current flows in terminal yn, the voltage drop across the bidirecti onal switch must not exceed 0.4 v. if the switch current flows into terminal z, no gnd current flows from terminal yn. in this case, there is no limit for the voltage drop across the switch. [2] applies to control signal levels. table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +6.5 v v i input voltage [1] ? 0.5 +6.5 v i ik input clamping current v i < ? 0.5 v or v i >v cc + 0.5 v ? 50 - ma i sk switch clamping current v i < ? 0.5 v or v i >v cc + 0.5 v - ? 50 ma v sw switch voltage enable and disable mode [2] ? 0.5 v cc + 0.5 v i sw switch current v sw > ? 0.5 v or v sw < v cc + 0.5 v - ? 50 ma i cc supply current - 100 ma i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? cto+125? c [3] - 250 mw table 6. operating conditions symbol parameter conditions min max unit v cc supply voltage 1.65 5.5 v v i input voltage 0 5.5 v v sw switch voltage enable and disable mode [1] 0v cc v t amb ambient temperature ? 40 +125 ?c ? t/ ? v input transition rise and fall rate v cc =1.65vto2.7v [2] - 20 ns/v v cc = 2.7 v to 5.5 v [2] - 10 ns/v
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 5 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 10. static characteristics [1] typical values are measured at t amb = 25 ? c. [2] these typical values are measured at v cc =3.3v. table 7. static characteristics at recommended operating conditions; volt ages are referenced to gnd (ground 0 v). symbol parameter conditions t amb = ? 40 ? c to +85 ?c t amb = ? 40 ? c to +125 ? c unit min typ [1] max min max v ih high-level input voltage v cc = 1.65 v to 1.95 v 0.65 ? v cc - - 0.65 ? v cc -v v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 3 v to 3.6 v 2.0 - - 2.0 - v v cc = 4.5 v to 5.5 v 0.7 ? v cc --0.7 ? v cc -v v il low-level input voltage v cc = 1.65 v to 1.95 v - - 0.35 ? v cc - 0.35 ? v cc v v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 3 v to 3.6 v - - 0.8 - 0.8 v v cc = 4.5 v to 5.5 v - - 0.3 ? v cc -0.3 ? v cc v i i input leakage current pin s and pin e ; v i =5.5vorgnd; v cc =0vto5.5v [2] - ? 0.1 ? 2- ? 10 ? a i s(off) off-state leakage current v cc =5.5v; see figure 4 [2] - ? 0.1 ? 5- ? 20 ? a i s(on) on-state leakage current v cc =5.5v; see figure 5 [2] - ? 0.1 ? 5- ? 20 ? a i cc supply current v i = 5.5 v or gnd; v sw =gndorv cc ; v cc =1.65vto5.5v [2] -0.110 - 40 ? a ? i cc additional supply current pin s and pin e ; v i =v cc ? 0.6 v; v sw =gndorv cc ; v cc =5.5v [2] -5500 - 5000 ? a c i input capacitance -2.5- - -pf c s(off) off-state capacitance -6.0- - -pf c s(on) on-state capacitance -18- - -pf
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 6 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 10.1 test circuits 10.2 on resistance v i =v cc or gnd; v o = gnd or v cc . fig 4. test circuit for measuring off-state leakage current v o i s 001aad390 s z e y0 y1 v cc gnd switch switch 1 1 2 2 v ih v il s v ih v ih e v i v il or v ih v ih v i =v cc or gnd and v o = open circuit. fig 5. test circuit for measuring on-state leakage current i s 001aad391 s z e y0 y1 v cc gnd v i v il or v ih v il switch 1 2v ih v il s v il v il e v o switch 1 2 table 8. on resistance at recommended operating conditions; voltages ar e referenced to gnd (ground 0 v); for graphs see figure 7 to figure 12 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max r on(peak) on resistance (peak) v i =gndtov cc ; see figure 6 i sw =4ma; v cc = 1.65 v to 1.95 v - 34.0 130 - 195 ? i sw =8ma; v cc = 2.3 v to 2.7 v - 12.0 30 - 45 ? i sw =12ma; v cc = 2.7 v - 10.4 25 - 38 ? i sw =24ma; v cc =3vto3.6v - 7.8 20 - 30 ? i sw =32ma; v cc = 4.5 v to 5.5 v - 6.2 15 - 23 ?
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 7 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer [1] typical values are measured at t amb = 25 ? c and nominal v cc . [2] flatness is defined as the difference between the maximum and minimum value of on resistance measured at identical v cc and temperature. 10.3 on resistance test circuit and graphs r on(rail) on resistance (rail) v i = gnd; see figure 6 i sw =4ma; v cc = 1.65 v to 1.95 v -8.218 - 27 ? i sw =8ma; v cc = 2.3 v to 2.7 v - 7.1 16 - 24 ? i sw =12ma; v cc =2.7v - 6.9 14 - 21 ? i sw =24ma; v cc =3vto3.6v - 6.5 12 - 18 ? i sw =32ma; v cc = 4.5 v to 5.5 v - 5.8 10 - 15 ? v i =v cc ; see figure 6 i sw =4ma; v cc = 1.65 v to 1.95 v - 10.4 30 - 45 ? i sw =8ma; v cc = 2.3 v to 2.7 v - 7.6 20 - 30 ? i sw =12ma; v cc =2.7v - 7.0 18 - 27 ? i sw =24ma; v cc =3vto3.6v - 6.1 15 - 23 ? i sw =32ma; v cc = 4.5 v to 5.5 v - 4.9 10 - 15 ? r on(flat) on resistance (flatness) v i =gndtov cc [2] i sw =4ma; v cc = 1.65 v to 1.95 v -26.0- - - ? i sw =8ma; v cc = 2.3 v to 2.7 v - 5.0 - - - ? i sw =12ma; v cc =2.7v - 3.5 - - - ? i sw =24ma; v cc =3vto3.6v - 2.0 - - - ? i sw =32ma; v cc = 4.5 v to 5.5 v - 1.5 - - - ? table 8. on resistance ?continued at recommended operating conditions; voltages ar e referenced to gnd (ground 0 v); for graphs see figure 7 to figure 12 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max r on = v sw / i sw . fig 6. test circuit for measuring on resistance i sw v sw 001aad392 s z e y0 y1 v cc gnd switch switch 1 1 2 2 v ih v il s v il v il e v i v il or v ih v il
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 8 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer (1) v cc = 1.8 v. (2) v cc = 2.5 v. (3) v cc = 2.7 v. (4) v cc = 3.3 v. (5) v cc = 5.0 v. fig 7. typical on resistance as a function of input voltage; t amb = 25 ?c v i (v) 05 4 23 1 mna673 20 10 30 40 r on () 0 (1) (2) (3) (4) (5) (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. fig 8. on resistance as a function of input voltage; v cc =1.8v fig 9. on resistance as a function of input voltage; v cc =2.5v v i (v) 0 2.0 1.6 0.8 1.2 0.4 001aaa712 25 35 15 45 55 r on () 5 (4) (3) (2) (1) v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aaa708 9 11 7 13 15 r on () 5 (1) (2) (3) (4)
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 9 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. fig 10. on resistance as a function of input voltage; v cc =2.7v fig 11. on resistance as a function of input voltage; v cc =3.3v 001aaa709 v i (v) 0 3.0 2.0 1.0 2.5 1.5 0.5 9 7 11 13 r on () 5 (1) (2) (3) (4) v i (v) 04 3 12 001aaa710 6 8 10 r on () 4 (1) (2) (3) (4) (1) t amb = 125 ? c. (2) t amb =85 ? c. (3) t amb =25 ? c. (4) t amb = ?40 ? c. fig 12. on resistance as a function of input voltage; v cc =5.0v v i (v) 05 4 23 1 001aaa711 5 4 6 7 r on () 3 (2) (4) (1) (3)
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 10 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 11. dynamic characteristics [1] typical values are measured at t amb =25 ? c and nominal v cc . [2] t pd is the same as t plh and t phl . [3] propagation delay is the calculated rc time constant of the typical on resistance of the switch and the specified capacitanc e when driven by an ideal voltage source (zero output impedance). [4] t en is the same as t pzh and t pzl . [5] t dis is the same as t plz and t phz . table 9. dynamic characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); for load circuit see figure 15 . symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min typ [1] max min max t pd propagation delay z to yn or yn to z; see figure 13 [2] [3] v cc = 1.65 v to 1.95 v - - 2 - 2.5 ns v cc = 2.3 v to 2.7 v - - 1.2 - 1.5 ns v cc = 2.7 v - - 1.0 - 1.25 ns v cc = 3.0 v to 3.6 v - - 0.8 - 1.0 ns v cc = 4.5 v to 5.5 v - - 0.6 - 0.8 ns t en enable time s to z or yn; see figure 14 [4] v cc = 1.65 v to 1.95 v 2.6 6.7 10.3 2.6 12.9 ns v cc = 2.3 v to 2.7 v 1.9 4.1 6.4 1.9 8.0 ns v cc = 2.7 v 1.9 4.0 5.5 1.8 7.0 ns v cc = 3.0 v to 3.6 v 1.8 3.4 5.0 1.8 6.3 ns v cc = 4.5 v to 5.5 v 1.3 2.6 3.8 1.3 4.8 ns e to z or yn; see figure 14 [4] v cc = 1.65 v to 1.95 v 1.9 4.0 7.3 1.9 9.2 ns v cc = 2.3 v to 2.7 v 1.4 2.5 4.4 1.4 5.5 ns v cc = 2.7 v 1.1 2.6 3.9 1.1 4.9 ns v cc = 3.0 v to 3.6 v 1.2 2.2 3.8 1.2 4.8 ns v cc = 4.5 v to 5.5 v 1.0 1.7 2.6 1.0 3.3 ns t dis disable time s to z or yn; see figure 14 [5] v cc = 1.65 v to 1.95 v 2.1 6.8 10.0 2.1 12.5 ns v cc = 2.3 v to 2.7 v 1.4 3.7 6.1 1.4 7.7 ns v cc = 2.7 v 1.4 4.9 6.2 1.4 7.8 ns v cc = 3.0 v to 3.6 v 1.1 4.0 5.4 1.1 6.8 ns v cc = 4.5 v to 5.5 v 1.0 2.9 3.8 1.0 4.8 ns e to z or yn; see figure 14 [5] v cc = 1.65 v to 1.95 v 2.3 5.6 8.6 2.3 11.0 ns v cc = 2.3 v to 2.7 v 1.2 3.2 4.8 1.2 6.0 ns v cc = 2.7 v 1.4 4.0 5.2 1.4 6.5 ns v cc = 3.0 v to 3.6 v 2.0 3.7 5.0 2.0 6.3 ns v cc = 4.5 v to 5.5 v 1.3 2.9 3.8 1.3 4.8 ns
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 11 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 11.1 waveforms and test circuits measurement points are given in table 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 13. input (yn or z) to output (z or yn) propagation delays t plh t phl v m v m v m v m gnd v i v oh v ol yn or z input z or yn output 001aac361 measurement points are given in table 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 14. enable and disable times v m v i gnd v cc v ol v oh gnd s, e input output low to off off to low output high to off off to high v m 001aad393 v m t pzl t phz t pzh v x v y switch disabled switch enabled switch enabled z, yn z, yn t plz table 10. measurement points supply voltage input output v cc v m v m v x v y 1.65 v to 2.7 v 0.5 ? v cc 0.5 ? v cc v ol +0.15v v oh ? 0.15 v 2.7 v to 5.5 v 0.5 ? v cc 0.5 ? v cc v ol +0.3v v oh ? 0.3 v
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 12 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 11.2 additional dynami c characteristics test data is given in table 11 . definitions test circuit: r t = termination resistance (shoul d be equal to output impedance z o of the pulse generator). c l = load capacitance (including jig and probe capacitance). r l = load resistance. v ext = external voltage for measuring switching times. fig 15. test circuit for measuring switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 11. test data supply voltage input load v ext v cc v i t r , t f c l r l t plh , t phl t pzh , t phz t pzl , t plz 1.65 v to 1.95 v v cc ? 2.0ns 30pf 1k ? open gnd 2 ? v cc 2.3 v to 2.7 v v cc ? 2.0ns 30pf 500 ? open gnd 2 ? v cc 2.7 v v cc ? 2.5ns 50pf 500 ? open gnd 2 ? v cc 3 v to 3.6 v v cc ? 2.5ns 50pf 500 ? open gnd 2 ? v cc 4.5 v to 5.5 v v cc ? 2.5ns 50pf 500 ? open gnd 2 ? v cc table 12. additional dynamic characteristics at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v); t amb =25 ? c. symbol parameter conditions min typ max unit thd total harmonic distortion f i = 600 hz to 20 khz; r l = 600 ? ; c l =50pf; v i = 0.5 v (p-p); see figure 16 v cc = 1.65 v - 0.260 - % v cc = 2.3 v - 0.078 - % v cc = 3.0 v - 0.078 - % v cc = 4.5 v - 0.078 - % f ( ? 3db) ? 3 db frequency response r l =50 ? ; c l = 5 pf; see figure 17 v cc =1.65v - 200 - mhz v cc =2.3v - 300 - mhz v cc =3.0v - 300 - mhz v cc =4.5v - 300 - mhz
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 13 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 11.3 test circuits ? iso isolation (off-state) r l =50 ? ; c l =5pf; f i =10mhz; see figure 18 v cc =1.65v - ? 42 - db v cc =2.3v - ? 42 - db v cc =3.0v - ? 40 - db v cc =4.5v - ? 40 - db q inj charge injection c l = 0.1 nf; v gen =0v; r gen =0 ? ; f i = 1 mhz; r l =1m ? ; see figure 19 v cc =1.8v - 3.3 - pc v cc =2.5v - 4.1 - pc v cc =3.3v - 5.0 - pc v cc =4.5v - 6.4 - pc v cc =5.5v - 7.5 - pc table 12. additional dynamic characteristics ?continued at recommended operating conditions; voltag es are referenced to gnd (ground = 0 v); t amb =25 ? c. symbol parameter conditions min typ max unit fig 16. test circuit for measuri ng total harmonic distortion d 001aad394 600 10 f 0.1 f s z y0 y1 v cc 0.5v cc gnd c l r l switch switch 1 1 2 2 v ih v il s v il v il e f i v il or v ih e v il adjust f i voltage to obtain 0 dbm level at output. increase f i frequency until db meter reads ? 3db. fig 17. test circuit for measuring the frequency response when switch is in on-state db 001aad395 50 0.1 f s z e y0 y1 v cc 0.5v cc gnd c l r l switch switch 1 1 2 2 v ih v il s v il v il e f i v il or v ih v il
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 14 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer adjust f i voltage to obtain 0 dbm level at input. fig 18. test circuit for measuring isolation (off-state) db 001aad396 50 r l 0.1 f s z e y0 y1 v cc 0.5v cc 0.5v cc gnd c l r l switch switch 1 1 2 2 v il v ih s v ih v ih e f i v il or v ih v ih a. test circuit b. input and output pulse definitions q inj = ? v o ? c l . ? v o = output voltage variation. r gen = generator resistance. v gen = generator voltage. fig 19. test circuit for measuring charge injection 001aad398 s z y0 y1 r l c l v cc gnd r gen v gen switch 1 2 v i v o e v il g 001aac478 v o off on off logic input v o (s)
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 15 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 12. package outline fig 20. package outline sot505-2 (tssop8) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (1) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.95 0.75 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.70 0.35 8 0 0.13 0.1 0.2 0.5 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.47 0.33 sot505-2 - - - 02-01-16 w m b p d z e 0.25 14 8 5 a 2 a 1 l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 1.1 pin 1 index
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 16 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer fig 21. package outline sot765-1 (vssop8) unit a 1 a max. a 2 a 3 b p lh e l p wy v ce d (1) e (2) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.85 0.60 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.1 8 0 0.13 0.1 0.2 0.4 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.40 0.15 q 0.21 0.19 sot765-1 mo-187 02-06-07 w m b p d z e 0.12 14 8 5 a 2 a 1 q l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale vssop8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 1 pin 1 index
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 17 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 13. abbreviations 14. revision history table 13. abbreviations acronym description cmos complementary metal-oxide semiconductor ttl transistor-transistor logic hbm human body model esd electrostatic discharge mm machine model cdm charged device model dut device under test mil military table 14. revision history document id release date data sheet status change notice supersedes 74lvc1g53_q100 v.1 20130129 product data sheet - -
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 18 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 15.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qualified for use in automotive applications. unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74lvc1g53_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 29 january 2013 19 of 20 nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74lvc1g53-q100 2-channel analog multiplexer/demultiplexer ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 29 january 2013 document identifier: 74lvc1g53_q100 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.3 on resistance test circuit and graphs. . . . . . . . 7 11 dynamic characteristics . . . . . . . . . . . . . . . . . 10 11.1 waveforms and test circuits . . . . . . . . . . . . . . 11 11.2 additional dynamic characteristics . . . . . . . . . 12 11.3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 16 contact information. . . . . . . . . . . . . . . . . . . . . 19 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20


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